As a power semiconductor device, for example, there is an insulated gate bipolar transistor (IGBT) or a diode with various classes of a breakdown voltage, for example, a breakdown voltage of 400 V, 600 V, 1200 V, 1700 V, 3300 V, or more. The power semiconductor device is used in a power conversion device, such as a converter or an inverter.
The following method has been known as a method for manufacturing the power semiconductor device. First, a front surface element structure is formed on a front surface of a semiconductor substrate. Then, a rear surface of the semiconductor substrate is removed by, for example, grinding to reduce the thickness of the semiconductor substrate. Then, impurity ions are implanted into the ground rear surface of the semiconductor substrate. Then, a heat treatment is performed to activate the impurity ions implanted into the rear surface of the semiconductor substrate to form a rear surface element structure. In addition, as this type of method, various methods have been proposed which radiate protons to the semiconductor substrate and perform a heat treatment to activate the protons (to change the protons into donors), thereby forming an n+ layer with a high concentration in the semiconductor substrate.
As the method for manufacturing the semiconductor device, a technique has been known which radiates protons to a semiconductor substrate to reduce electron/hole mobility at a proton irradiation position (for example, see the following Patent Document 1). In addition, heat treatment conditions after protons are radiated to a semiconductor substrate have been known (for example, see the following Patent Document 2). After protons are radiated, annealing is performed at a predetermined temperature to recover a crystal defect layer. As a result, the carrier concentration is recovered. In addition, a method has been known in which a plurality of proton irradiation processes are performed to form a plurality of n+ layers including hydrogen donors and the depth of an n+ layer, which is formed at the deepest position from the rear surface of a substrate, from the rear surface of the substrate is 15 μm (for example, see the following Patent Document 3).